Die (Electronics) – Wikipedia

The the ^[first] It is the subtle plate of semiconductor material on which the electronic circuit of the integrated circuit was made, in turn made through a lithographic procedure.

The the sealed in its container, called with the English term package (literally “pack”, “package”), forms an electronic component (the integrated circuit). Between the (size of a few millimeters) and the accessible terminals of the integrated circuit (called with the Italian term “feet” or with the English term the battery ) the electrical connection is made by means of very thin wires.

The realization of the the From the first transistors to modern microprocessors, it contains most of the history of semiconductor electronic technology.

The production process takes place on a monochristalline silicon substrate with very low number of impurities and crystallographic defects. ^[2]

These substrates are made up of wafer of diameter silicon between 10 and 12 inches (between 25.40 and 30.48 cm) and of a thickness less than the millimeter. Of this substrate only the upper part will be interested in processing, as all the devices will be made practically on the surface of the wafer , in a thickness of the order of 10 ÷ 20 microns. The lower part is called bulk . For this reason, when we refer to the technology of the integrated circuits we talk about silicon planar technology .
The processes necessary to obtain the wafer For the manufacture of the integrated circuits they are very complex but can be so simplified:

1. It starts from quartzite ^[3] as raw material and it is subjected to complex refining processes to ensure that it becomes polycrystalline silicon, defined as an electronic degree (EGS), ^[4] that is silicon with less than one impulity every billion atoms (very pure).
2. EGS type polysilenic is subjected to crystalline growth to obtain an ultra -part monochristalline ingot. To this end, there are two techniques: the Czochralski (Cz) by Float Zone (FZ).
3. Each ingot is sawn, in order to obtain the wafer juicy and lapped to avoid that on the surface of the wafer There are irregularities that have a heavy in a heavy way on the proper functioning of the integrated circuit. Because of irregularities, in fact, there could be changes in the thickness of the conductive slopes, with consequent variations, in some point, of the electrical conductivity of the same.

Protection and isolation [ change | Modifica Wikitesto ]

Once the wafer It is necessary to protect it from corrosive processes, inevitably triggered by any water particles in the air, and by mechanical stresses to which it can be subjected. To this end, a deposition of insulating material is usually carried out also having the function of preventing any short circuits between the conductive slopes arranged on layer ^[6] different.

The silicon oxide, Sio ₂ , is the most widespread insulating employed in the production of integrated circuits. There are several techniques that allow you to have an oxide growth on the surface of the silicon slice, but the most used one is thermal oxidation. This procedure consists in exposing silicon to oxidizing agents, such as water or oxygen, at high temperatures and allows you to have good control over the thickness of the oxidized layer and on the chemical properties of the Sio layer ₂ increased. The silicon oxide, left free to act without any external control, would tend to form quartz, and it is for this reason that it is necessary to work at temperatures of the order of 1000 ° C.

By forcing the oxide to have a thermal growth on the slice of silicon, in fact, it is made so that it deforms no longer constituting a crystalline but amorphous structure. Furthermore, an oxidation at room temperature would cause the passivation of silicon and thus block the continuation of oxidation.
Depending on whether it is used as oxygen oxidant agent (or ₂ ) or water (h ₂ O), we speak respectively of dry oxidation and of wet oxidation .
The chemical reactions that take place in these oxidations are respectively:

• 
  ${Displaystyle {ce {si + o2-> SIO2}}}}}$

  
  ${displaystyle {ce {Si + 2H2O -> SiO2 + 2H2}}}$

  [7] ^[8] Other compounds such as silicon nitrure (yes ₃ N ₄ ) are used to protect the chip from humidity.
  These insulating layers are usually deposited for sputtering O c hemical in Monkeys d epation (CVD).

  As the oxidation process advances, the silicon is consumed and the thickness of the layer In Sio ₂ Increase by moving the Siio interface ₂ deeper in the silicon substrate. Since the density of the silicon is equal to 5.0 × 10 ²² atomi/cm ³ , while that of silicon oxide is equal to 2.2 × 10 ²² atomi/cm ³ , oxidation involves an increase in volume. This increase in volume can be evaluated from the ratio between the volume of accreetted oxide and volume of silicon consumed, and being equal to the ratio between the density of the silicon and that of silicon oxide, it is equal to 2.28. The oxide-silicic interface, therefore, will lower, compared to the initial position, of 44% of the thickness of the oxide increased, being 2.28 ⁻¹ = 0.44 by approximately approximately to the second decimal figure.

  Lithography [ change | Modifica Wikitesto ]

  

  The manufacture of the circuits integrated on wafer of silicon requires that many layer , each with a different scheme, are deposited on the surface one at a time, and that the drugge of the active areas is made in the right doses avoiding that it will spread in regions other than those of the project. The various pattern ^[9] used in the deposition of layer On the substrate they are made thanks to a process called lithography.

  The lithography process develops in various stages.

  First the surface of the wafer It is covered with a material called p picture r front (PR); This layer is then selectively exposed to radiation such as ultraviolet light, X -rays, ionic bundle or
  electronic bundle. The selection of the area to be irradiated takes place through the use of a mask on which the pattern that you want to give to layer On the silicon substrate, and which is transparent everywhere except in the areas on which the shapes of the scheme have been made, or, in the case of the use of an ionic bundle, using a cannon, controlled by an appropriate software, similar to those present in the Cinecopes of televisions. In the latter case we speak of electrolyteography, while when using ultraviolet light we talk about photolithography.

  When the photoresist It is bombed by an appropriate radiation, it polymerizes. After the exposure, the PR is subject to development (as a photographic film) that destroys the areas exposed to radiation or those in shadow depending on whether a positive or negative PR has been used. The first, in fact, lets the polymerized areas attack, the second, on the contrary, those not polymerized by obtaining the dual forms to those obtained with the first PRO cited. Usually the development consists of three acid attacks: in the first one digs in the pr until the oxide layer, in the second you reach the silicon below and with the last one is removed the photoresist residue.

  The process of removing the photoresist It is an isotropic process and for this reason the phenomenon of “under attack” can take place or under etching during which what is found under the resist .
  The processes of etching Generally they are divided into completely isotropic ones, which use chemical reagents (acid attack) and which are called wet etching , and those completely anisotropic called dry etching . The latter use oxidizing and reducing agents, products from process gases ionized by means of a plasma discharge. For this reason we talk about plasma etching .

  

  The latter type of etching , in addition to isotropy, it is characterized by being slower than the first, from having good control, a higher resolution and a greater cost of realization than the type of type wet which for its part allows to obtain more smooth surfaces.

  Follows the cutting phase of the wafer in individuals dice . ^[ten]

  At this point the chips produced are controlled. The relationship between the number of dice functioning and that of dice total products. This value in modern factories is also greater than 90%.

  I dice are fixed within the containers (process of die-packaging ) and connected to the metal terminals of package (process of wire bonding ) with thinner metal wire of a hair, ranging from about 15 μ to about 0.25 mm ^[11] ,
  of different materials: gold, aluminum ^[twelfth] a frame. ^{[11] [13]}

  The terminals of the package are the means with which the the It can communicate with the circuit in which it will be inserted.

  1. ^ “Die” is an English loan. In the English language the He has, among the various meanings, that of “mold” or, more precisely, “matrix” (female element of a mold). It is by semantic extension of this meaning that the term the It was chosen in the English language to indicate the thin plate of semiconductor material on which the electronic circuit of the integrated circuit was made. The realization of this electronic circuit takes place through a technique, the lithography, similar and homonymous to that used in the press. The English plural of the And dies O dice .
  2. ^ To name a few: disputes, holidays, interstitial defects, presence of replacement atoms.
  3. ^ Other sources quote siliceous sand as raw material from which the silicon refining process is started.
     See for example:
     • ( IN ) Sami Franssila, Introduction to microfabrication , Hoboken, New Jersey, John Wiley and Sons, 2004, p. 401, ISBN 0-470-85106-6. (Sami Franssila teaches the Helsinki University of Technology).
       Is available on the net: ( IN ) Introduction to microfabrication (Anteprima limitata) . are Books.google.it , Google Libri, 2004, 36 of 401. URL consulted on August 2, 2009 .
     • Prof. Mara Bruzzi – Solid state physics – Appendix n. 3 ( PDF ), are www2.de.unifi.it , University of Florence – Department of Energy “Sergio Stecco”, 2008, 2 of 14. URL consulted on August 2, 2009 (archived by URL Original March 4, 2011) . .
       In any case, technological research in this field is always evolving.

  4. ^ Electronic Grade Silicon
  5. ^ The integrated is an eprom, an obsolete component.
  6. ^ Literally: layers, levels.
  7. ^ Silicon is very sensitive to contamination due to the environment that would irreparably high the electrical characteristics. Its surface is then protected by means of a layer of silicon dioxide. This treatment is called passivation.
  8. ^ Guido Torelli, Introduction to the technology of the circuits integrated on silicon ( PDF ) ^{[ interrupted connection ]} . are Ims.unipv.it , University of Pavia – Electronics Dip. – Laboratory of Integrated Microsystems, January 2006, 11 of 87. URL consulted on August 2, 2009 .
  9. ^ Literally: models, drawings, champions.
  10. ^ Some details on the cutting operation of the wafer : COB and hybrid circuits – From wafer to die attach . are Elettronicanews.it , Electronics News, 27 July 2009. URL consulted on July 30, 2021 (archived by URL Original April 13, 2013) . .
  11. ^ ^{a b} For the diameter and metals of the connections see:
      • ( IN ) Bonding Wires . are siliconfareast.com , www.siliconfareast.com, 2005-2007. URL consulted on August 2, 2009 .
      • COB and hybrid circuits – Die Bonding . are Elettronicanews.it , Electronics News, 27 July 2009. URL consulted on July 30, 2021 (archived by URL Original April 13, 2013) .

  12. ^ ( IN ) Microelectronics Interconnect Materials: Bonding Wire and Ribbon – Aluminum and Silicon Aluminum Wire & Ribbon . are Coininginc.com , Coining, Inc, 2009. URL consulted on 29 July 2009 (archived by URL Original March 20, 2014) .
  13. ^ The copper tends to oxidize easily during overheating during the welding phase, so the operation must be done in the nitrogen atmosphere; Gold does not present this problem.

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