[{"@context":"http:\/\/schema.org\/","@type":"BlogPosting","@id":"https:\/\/wiki.edu.vn\/en\/wiki19\/hopper-microarchitecture-wikipedia\/#BlogPosting","mainEntityOfPage":"https:\/\/wiki.edu.vn\/en\/wiki19\/hopper-microarchitecture-wikipedia\/","headline":"Hopper (microarchitecture) – Wikipedia","name":"Hopper (microarchitecture) – Wikipedia","description":"From Wikipedia, the free encyclopedia GPU microarchitecture designed by Nvidia Nvidia Hopper Fabrication process TSMC N4 Predecessor Ampere (consumer, professional)","datePublished":"2022-12-21","dateModified":"2022-12-21","author":{"@type":"Person","@id":"https:\/\/wiki.edu.vn\/en\/wiki19\/author\/lordneo\/#Person","name":"lordneo","url":"https:\/\/wiki.edu.vn\/en\/wiki19\/author\/lordneo\/","image":{"@type":"ImageObject","@id":"https:\/\/secure.gravatar.com\/avatar\/c9645c498c9701c88b89b8537773dd7c?s=96&d=mm&r=g","url":"https:\/\/secure.gravatar.com\/avatar\/c9645c498c9701c88b89b8537773dd7c?s=96&d=mm&r=g","height":96,"width":96}},"publisher":{"@type":"Organization","name":"Enzyklop\u00e4die","logo":{"@type":"ImageObject","@id":"https:\/\/wiki.edu.vn\/wiki4\/wp-content\/uploads\/2023\/08\/download.jpg","url":"https:\/\/wiki.edu.vn\/wiki4\/wp-content\/uploads\/2023\/08\/download.jpg","width":600,"height":60}},"image":{"@type":"ImageObject","@id":"https:\/\/upload.wikimedia.org\/wikipedia\/commons\/thumb\/a\/ad\/Commodore_Grace_M._Hopper%2C_USN_%28covered%29.jpg\/220px-Commodore_Grace_M._Hopper%2C_USN_%28covered%29.jpg","url":"https:\/\/upload.wikimedia.org\/wikipedia\/commons\/thumb\/a\/ad\/Commodore_Grace_M._Hopper%2C_USN_%28covered%29.jpg\/220px-Commodore_Grace_M._Hopper%2C_USN_%28covered%29.jpg","height":"275","width":"220"},"url":"https:\/\/wiki.edu.vn\/en\/wiki19\/hopper-microarchitecture-wikipedia\/","about":["Wiki"],"wordCount":4514,"articleBody":"From Wikipedia, the free encyclopediaGPU microarchitecture designed by NvidiaNvidia HopperFabrication processTSMC N4PredecessorAmpere (consumer, professional)Supported  Grace Hopper, eponym of the architectureHopper is the codename for Nvidia’s GPU Datacenter microarchitecture that will be parallel release of Ada Lovelace (for the consumer segment).[citation needed] It is named after the American computer scientist and United States Navy Rear Admiral Grace Hopper. Hopper was once rumored to be Nvidia’s first generation of GPUs that will use multi-chip modules (MCMs), although the H100 announcement showed a massive monolithic die.[1][2][3][4][5][6] Nvidia officially announced the Hopper GPU microarchitecture and H100 GPU at GTC 2022 on March 22, 2022.[7]Table of ContentsDetails[edit]Chips[edit]Products using Hopper[edit]See also[edit]References[edit]Details[edit]Architectural improvements of the Hopper architecture include the following:[8]CUDA Compute Capability 9.0[9]TSMC N4 FinFET processFourth-generation Tensor Cores with FP8, FP16, bfloat16, TensorFloat-32 (TF32) and FP64 support and sparsity acceleration.New Nvidia Transformer Engine with FP8 and FP16New DPX instructionsHigh Bandwidth Memory 3 (HBM3) on H100 80GBDouble FP32 cores per Streaming Multiprocessor (SM)NVLink 4.0PCI Express 5.0 with SR-IOV support (SR-IOV is reserved only for H100)Second Generation Multi-instance GPU (MIG) virtualization and GPU partitioning feature in H100 supporting up to seven instancesPureVideo feature set  hardware video decoding8 NVDEC for H100Adds new hardware-based single-core JPEG decode with 7 NVJPG hardware decoders (NVJPG) with YUV420, YUV422, YUV444, YUV400, RGBA. Should not be confused with Nvidia NVJPEG (GPU-accelerated library for JPEG encoding\/decoding)Chips[edit]Comparison of Compute Capability: GP100 vs GV100 vs GA100 vs GH100[10][11]GPU featuresNVIDIA Tesla P100NVIDIA Tesla V100NVIDIA A100NVIDIA H100GPU codenameGP100GV100GA100GH100GPU architectureNVIDIA PascalNVIDIA VoltaNVIDIA AmpereNVIDIA HopperTransistors15.3 billion21.1 billion54.2 billion80 billionProcess16nm12nmTSMC 7nmTSMC 4nmDie size610 mm2828 mm2815 mm2814 mm2Compute capability6.07.08.09.0Threads \/ warp32323232Max warps \/ SM64646464Max threads \/ SM2048204820482048Max thread blocks \/ SM32323232Max Thread Blocks \/ Thread Block ClustersN\/AN\/AN\/A16Max 32-bit registers \/ SM65536655366553665536Max registers \/ block65536655366553665536Max registers \/ thread255255255255Max thread block size1024102410241024FP32 cores \/ SM646464128Ratio of SM registers to FP32 cores102410241024512Shared Memory Size \/ SM64 KBConfigurable up to 96 KBConfigurable up to 164 KBConfigurable up to 228 KBComparison of Precision Support Matrix[12][13]Supported CUDA Core PrecisionsSupported Tensor Core PrecisionsFP8FP16FP32FP64INT1INT4INT8TF32BF16FP8FP16FP32FP64INT1INT4INT8TF32BF16NVIDIA Tesla P4NoNoYesYesNoNoYesNoNoNoNoNoNoNoNoNoNoNoNVIDIA P100NoYesYesYesNoNoNoNoNoNoNoNoNoNoNoNoNoNoNVIDIA VoltaNoYesYesYesNoNoYesNoNoNoYesNoNoNoNoNoNoNoNVIDIA TuringNoYesYesYesNoNoYesNoNoNoYesNoNoYesYesYesNoNoNVIDIA A100NoYesYesYesNoNoYesNoYesNoYesNoYesYesYesYesYesYesNVIDIA H100NoYesYesYesNoNoYesNoYesYesYesNoYesNoNoYesYesYesLegend:FPnn: floating point with nn bitsINTn: integer with n bitsINT1: binaryTF32: TensorFloat32BF16: bfloat16Comparison of Decode PerformanceConcurrent streamsH.264 decode (1080p30)H.265 (HEVC) decode (1080p30)VP9 decode (1080p30)V100162222A10075157108H100170340260Images\/sec[11]JPEG 4:4:4 decode(1080p)JPEG 4:2:0 decode(1080p)A10014902950H10033106350Products using Hopper[edit]See also[edit]References[edit]^ kopite7kimi (June 10, 2019). “After Ampere, the next codename of GeForce is Hopper, in memory of Grace Hopper”. @kopite7kimi. Retrieved December 1, 2019.^ “Hardware- und Nachrichten-Links des 11.\/12. November 2019”. www.3dcenter.org (in German). Retrieved December 1, 2019.^ Hagedoorn, Hilbert. “NVIDIA Next Gen-GPU Hopper could be offered in chiplet design”. Guru3D.com. Retrieved December 1, 2019.^ Pirzada, Usman (November 16, 2019). “NVIDIA Next Generation Hopper GPU Leaked – Based On MCM Design, Launching After Ampere”. Wccftech. Retrieved December 1, 2019.^ “NVIDIA Hopper GPU Architecture and H100 Accelerator Announced: Working Smarter and Harder”. AnandTech. March 22, 2022.^ “NVIDIA Hopper Architecture In-Depth”. Nvidia. March 22, 2022.^ “NVIDIA Announces Hopper Architecture, the Next Generation of Accelerated Computing”.^ “NVIDIA Hopper GPU Architecture”.^ “CUDA C++ Programming Guide”.^ “NVIDIA A100 Tensor Core GPU Architecture” (PDF). www.nvidia.com. Retrieved September 18, 2020.^ a b “NVIDIA H100 Tensor Core GPU Architecture Whitepaper”. NVIDIA.^ “NVIDIA Tensor Cores: Versatility for HPC & AI”. NVIDIA.^ “Abstract”. docs.nvidia.com."},{"@context":"http:\/\/schema.org\/","@type":"BreadcrumbList","itemListElement":[{"@type":"ListItem","position":1,"item":{"@id":"https:\/\/wiki.edu.vn\/en\/wiki19\/#breadcrumbitem","name":"Enzyklop\u00e4die"}},{"@type":"ListItem","position":2,"item":{"@id":"https:\/\/wiki.edu.vn\/en\/wiki19\/hopper-microarchitecture-wikipedia\/#breadcrumbitem","name":"Hopper (microarchitecture) – Wikipedia"}}]}]